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IRFP9150
Data Sheet August 1999 File Number
2293.4
25A, 100V, 0.150 Ohm, P-Channel Power MOSFET
This advanced power MOSFET is designed, tested, and guaranteed to withstand a specified level of energy in the breakdown avalanche mode of operation. It is a P-Channel enhancement mode silicon-gate power field effect transistor designed for applications such as switching regulators, switching convertors, motor drivers, relay drivers, and drivers for high power bipolar switching transistors requiring high speed and low gate drive power. These types can be operated directly from integrated circuits. The P-Channel IRFP9150 is an approximate electrical complement to the N-channel IRFP150. Formerly developmental type TA49230.
Features
* 25A, 100V * rDS(ON) = 0.150 * Single Pulse Avalanche Energy Rated * SOA is Power Dissipation Limited * Nanosecond Switching Speeds * Linear Transfer Characteristics * High Input Impedance
Symbol
D
Ordering Information
PART NUMBER IRFP9150 PACKAGE TO-247 BRAND IRFP9150
G
S
NOTE: When ordering, use the entire part number.
Packaging
JEDEC STYLE TO-247
SOURCE DRAIN GATE DRAIN (FLANGE)
4-63
CAUTION: These devices are sensitive to electrostatic discharge; follow proper ESD Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
IRFP9150
Absolute Maximum Ratings
TC = 25oC, Unless Otherwise Specified IRFP9150 -100 -100 -25 -18 -100 20 150 1.2 1300 -55 to 150 300 260 UNITS V V A A A V W W/oC mJ oC
oC oC
Drain to Source Voltage (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VDS Drain to Gate Voltage (RGS = 10k) (Note 1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .VDGR Continuous Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID TC =100oC . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . ID Pulsed Drain Current . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . IDM Gate to Source Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . VGS Maximum Power Dissipation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PD Linear Derating Factor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Single Pulse Avalanche Energy Rating (Note 3) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Eas Operating and Storage Temperature . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TJ , TSTG Maximum Temperature for Soldering Leads at 0.063in (1.6mm) from Case for 10s. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . TL Package Body for 10s, See Techbrief 334 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .Tpkg
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. TJ = 25oC to 125oC
Electrical Specifications
PARAMETER
TC = 25oC, Unless Otherwise Specified SYMBOL BVDSS VGS(TH) IDSS
ID(ON)
TEST CONDITIONS VGS = 0V, ID = -250A (Figure 10) VDS = VGS, ID = -250A VDS = Rated BVDSS, VGS = 0V VDS = 0.8 x Rated BVDSS, VGS = 0V, TC = 125oC
MIN 1 -2.0 -25 4 -
TYP 0.090 10 16 110 65 46 82 14 42 2400 850 400 5.0
MAX -4.0 25 250 100 0.150 24 160 100 70 120 -
UNITS V V A A A nA S ns ns ns ns nC nC nC pF pF pF nH
Drain to Source Breakdown Voltage Gate Threshold Voltage Zero Gate Voltage Drain Current
On-State Drain Current (Note 2) Gate to Source Leakage Current Drain to Source On Resistance (Note 2) Forward Transconductance (Note 2) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Total Gate Charge (Gate to Source + Gate to Drain) Gate to Source Charge Gate to Drain "Miller" Charge Input Capacitance Output Capacitance Reverse Transfer Capacitance Internal Drain Inductance
VDS > ID(ON) x rDS(ON)MAX, VGS = 10V VGS = 20V VGS = -10V, I D = -10A (Figure 8, 9) VDS -10V, ID = -12.5A (Figure 12) VDD = -50V, ID -25A, RG = 6.8, RL = 2 (Figures 17 and 18) MOSFET switching times are essentially independent of operating temperature).
IGSS rDS(ON) gfs td(ON) tr td(OFF) tf Qg(TOT) Qgs Qgd CISS COSS CRSS LD
VGS = -10V, ID = -25A, VDS = 0.8 x Rated BVDSS Ig(REF) = -1.5mA (Figures 14, 19, 20) (Gate Charge is Essentially Independent Of Operating Temperature) VGS = 0V, VDS = -25V, f = 1.0MHz (Figure 11)
-
Measured From the Drain Lead, 6mm (0.25in) From the Package to the Center of the Die Measured From the Source Pin, 6mm (0.25in) From Header to the Source Bonding Pad
Modified MOSFET Symbol Showing the Internal Device Inductances
D LD G LS S
-
Internal Source Inductance
LS
-
13
-
nH
Thermal Resistance Junction to Case Thermal Resistance Junction to Ambient
RJC RJA Free Air Operation
-
-
0.83 30
oC/W
0C/W
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IRFP9150
Source to Drain Diode Specifications
PARAMETER Continuous Source to Drain Current Pulse Source to Drain Current (Note 3) SYMBOL ISD ISDM TEST CONDITIONS Modified MOSFET Symbol Showing the Integral Reverse P-N Junction Diode
G D
MIN -
TYP -
MAX -25 -100
UNITS A A
S
Source to Drain Diode Voltage (Note 2) Reverse Recovery Time Reverse Recovered Charge NOTES:
VSD trr QRR
TJ = 25oC, ISD = -25A, VGS = 0V (Figure 13) TJ = 25oC, ISD = -25A, dISD/dt = 100A/s TJ = 25oC, ISD = -25A, dISD/dt = 100A/s
0.3
-0.9 150 0.7
-1.5 300 1.5
V ns C
2. Pulse test: pulse width 300s, duty cycle 2%. 3. Repetitive Rating: Pulse width limited by Maximum junction temperature. See Transient Thermal Impedance curve (Figure 3 4. VDD = 25V, start TJ = 25oC, L = 3.2mH, RG = 25, peak IAS = 25A (Figures 15, 16).
Typical Performance Curves
1.2 POWER DISSIPATION MULTIPLIER 1.0
Unless Otherwise Specified
-30 -25 ID, DRAIN CURRENT (A) -20 -15 -10 -5
0.8 0.6 0.4 0.2 0 0 50 100 150 TC, CASE TEMPERATURE (oC)
0 25 50 75 100 125 150 TC, CASE TEMPERATURE (oC)
FIGURE 1. NORMALIZED POWER DISSIPATION vs CASE TEMPERATURE
FIGURE 2. MAXIMUM CONTINUOUS DRAIN CURRENT vs CASE TEMPERATURE
10 NORMALIZED EFFECTIVE TRANSIENT THERMAL IMPEDANCE DUTY CYCLE IN DESCENDING ORDER 0.5 0.2 0.1 0.05 0.02 0.01
1
0.10
PDM
t1
SINGLE PULSE 0.01 10-5 10-4 10-2 10-1 10-3 t1, SQUARE WAVE PULSE DURATION (s)
t2 NOTES: DUTY FACTOR: D = t1/t2 TJ = PDM x ZJC x RJC + TC 1 10
FIGURE 3. NORMALIZED MAXIMUM TRANSIENT THERMAL IMPEDANCE
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IRFP9150 Typical Performance Curves
200 IRFP9150,1 100 ID, DRAIN CURRENT (A) ID, DRAIN CURRENT (A) -80
Unless Otherwise Specified (Continued)
-100 VGS = 14V PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX TC = 25oC VGS = 12V
10ms IRFP9150,1 100ms 10 OPERATION IN THIS AREA IS LIMITED BY rDS(ON) TC = 25oC TJ = MAX RATED 1 1
VGS = 10V VGS = 9V VGS = 8V VGS = 7V
-60
-40
0.1s 1s IRFP9150 IRFP9151 DC 100
-20 VGS = 4V 0 -10 -20 -30
VGS = 6V VGS = 5V -40 -50
10 VDS, DRAIN VOLTAGE (V)
(VDS), DRAIN TO SOURCE VOLTAGE (V)
FIGURE 4. FORWARD BIAS SAFE OPERATING AREA
FIGURE 5. OUTPUT CHARACTERISTICS
ID(ON), DRAIN TO SOURCE CURRENT (A)
-50 ID, DRAIN CURRENT (A)
PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX TC = 25oC
-100 PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VDS -50V -10
VGS = 10V VGS = 8V VGS = 7V
-40
-30
-20
VGS = 6V VGS = 5V VGS = 4V
-1
-10
0
0
-1
-2
-3
-4
-5
-0.1
0
VDS, DRAIN TO SOURCE VOLTAGE (V)
-2 -4 -6 -8 VGS, GATE TO SOURCE VOLTAGE (V)
-10
FIGURE 6. SATURATION CHARACTERISTICS
FIGURE 7. TRANSFER CHARACTERISTICS
350 300 ON RESISTANCE (m) 250 200 150 100 50
NORMALIZED DRAIN TO SOURCE ON RESISTANCE
PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VGS = 10V
2.2
rDS(ON), DRAIN TO SOURCE
1.8
PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX VGS = 10V, ID = -10A
1.4
1.0
VGS = 20V
0.6
0.2 0 -20 -40 -60 -80 -100 -40 ID, DRAIN CURRENT (A) 0 40 80 TJ, JUNCTION TEMPERATURE (oC) 120
FIGURE 8. DRAIN TO SOURCE ON RESISTANCE vs GATE VOLTAGE AND DRAIN CURRENT
FIGURE 9. NORMALIZED DRAIN TO SOURCE ON RESISTANCE vs JUNCTION TEMPERATURE
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IRFP9150 Typical Performance Curves
1.25 ID = 250A NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE 4000 1.15 C, CAPACITANCE (pF) 3500 3000 2500 2000 1500 1000 500 0.75 -40 0 40 80 120 TJ, JUNCTION TEMPERATURE (oC) 160 0 CRSS -10 -20 -30 -40 VDS, DRAIN TO SOURCE VOLTAGE (V) -50 COSS CISS
Unless Otherwise Specified (Continued)
4500 VGS = 0V, f = 1MHz CISS = CGS + CGD CRSS = CGD COSS CDS + CGD
1.05
0.95
0.85
FIGURE 10. NORMALIZED DRAIN TO SOURCE BREAKDOWN VOLTAGE vs JUNCTION TEMPERATURE
FIGURE 11. CAPACITANCE vs DRAIN TO SOURCE VOLTAGE
15 gfs, TRANSCONDUCTANCE (S) PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX 12 150oC 9 25oC
100
PULSE DURATION = 80s DUTY CYCLE = 0.5% MAX
ISD, DRAIN CURRENT (A)
10
150oC 1
25oC
6
3
0
-10
-20 -30 ID, DRAIN CURRENT (A)
-40
-50
0.1 0.3
0.5
0.7
0.9
1.1
1.3
1.5
1.7
VSD, SOURCE TO DRAIN VOLTAGE (V)
FIGURE 12. TRANSCONDUCTANCE vs DRAIN CURRENT
FIGURE 13. SOURCE TO DRAIN DIODE VOLTAGE
0 VGS, GATE TO SOURCE VOLTAGE (V) ID = -25A
-5
VDS -10
= -80V VDS = -50V
-15 VDS = -20V
-20
0
20
40
60
80
100
120
140
160
180
Qg(TOT), TOTAL GATE CHARGE (nC)
FIGURE 14. GATE TO SOURCE VOLTAGE vs GATE CHARGE
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IRFP9150 Test Circuits and Waveforms
VDS tAV L VARY tP TO OBTAIN REQUIRED PEAK IAS RG 0
+
VDD VDD
0V VGS
DUT tP IAS 0.01
IAS tP BVDSS VDS
FIGURE 15. UNCLAMPED ENERGY TEST CIRCUIT
FIGURE 16. UNCLAMPED ENERGY WAVEFORMS
tON td(ON) tr RL 0 10%
tOFF td(OFF) tf 10%
DUT VGS RG
VDD
+
VDS VGS 0
90%
90%
10% 50% PULSE WIDTH 90% 50%
FIGURE 17. SWITCHING TIME TEST CIRCUIT
FIGURE 18. RESISTIVE SWITCHING WAVEFORMS
CURRENT REGULATOR
-VDS (ISOLATED SUPPLY) 0 DUT VDS
12V BATTERY
0.2F
50k 0.3F Qgs D G DUT VDD Qgd Qg(TOT) VGS
0 Ig(REF) IG CURRENT SAMPLING RESISTOR S +VDS ID CURRENT SAMPLING RESISTOR 0
Ig(REF)
FIGURE 19. GATE CHARGE TEST CIRCUIT
FIGURE 20. GATE CHARGE WAVEFORMS
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IRFP9150
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Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
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